How an ARM Chip Gets Made

From blueprint to data center — the journey of the Arm AGI CPU

Step 1
Design
Cambridge, UK & San Jose, CA

ARM designs the chip

ARM creates the instruction set architecture (ISA) — the fundamental "language" the chip speaks. For the AGI CPU, they also designed the full chip layout themselves, a first for the company.

  • ISA License: ARM's bread & butter — Qualcomm, Apple, Nvidia, MediaTek all pay to use it
  • This time: ARM designed the whole chip in-house, not just the ISA
  • Output: A "tape-out" file — essentially a massive blueprint sent to the foundry
Why this matters

ARM going from licensor → chip maker is like a car designer opening their own factory. They're now competing with their own customers (Qualcomm, Nvidia) while still selling them designs.

Step 2
Fabrication
Tainan, Taiwan

TSMC prints the silicon

TSMC takes ARM's blueprint and prints it onto silicon wafers using extreme ultraviolet (EUV) lithography. The AGI CPU uses TSMC's 3nm process — transistors roughly the size of a strand of DNA.

  • What happens: Hundreds of layers are etched onto a 300mm silicon wafer
  • Each wafer: Contains dozens to hundreds of individual chip "dies"
  • Output: Bare silicon dies — tiny squares of transistors, not yet usable chips
The bottleneck

TSMC fabs ~90% of the world's most advanced chips. There's no real alternative for leading-edge silicon. Intel Foundry is trying to compete, but isn't there yet for outside customers.

Step 3
Advanced Packaging
Taiwan (TSMC or OSAT partner)

🔬 What is CoWoS?

Chip-on-Wafer-on-Substrate — TSMC's proprietary method for connecting multiple chip dies together on a single package. Think of it as building a tiny city on a silicon foundation.

Heat Spreader
Metal Lid (dissipates heat)
↕
Chiplets
HBM Memory
CPU Die
CPU Die
HBM Memory
↕ micro-bumps
Interposer
Silicon Interposer (connects everything)
↕ C4 bumps
Substrate
Organic Substrate (routes to board)
  • Why it exists: Modern AI chips are too big/complex for a single die — split into chiplets and reconnect
  • The interposer: A thin slice of silicon that acts as a highway between chiplets
  • This is the new bottleneck: CoWoS capacity is what's constraining AI chip supply, not fab capacity
Who does this

For the highest-end chips (Nvidia H100/B200, ARM AGI CPU), TSMC does this in-house. But they can't keep up with demand, so they're licensing the tech to OSATs to help.

Step 4
OSAT
Taiwan, Korea, Arizona (soon)

🏭 What is an OSAT?

Outsourced Semiconductor Assembly & Test — independent companies that take bare dies from foundries and turn them into finished, tested chips ready to solder onto circuit boards.

  • Assembly: Mount dies onto substrates, add solder balls, attach heat spreaders
  • Test: Verify every chip works — burn-in testing, speed binning, quality checks
  • Why they exist: Foundries focus on printing silicon; OSATs focus on everything after

The Key Players

ASE Technology 3711.TW / ASX
  • World's #1 OSAT — largest and most diversified
  • Packages for TSMC customers AND Intel
  • TSMC licensing CoWoS-type tech to ASE for overflow capacity
  • Advanced packaging revenue doubling+ in 2025 (~$1.6B)

Amkor Technology AMKR
  • Largest US-headquartered OSAT
  • Building a $7B Arizona campus next to TSMC's Arizona fabs
  • Apple is a major customer (via TSMC)
  • Best positioned for US-manufactured ARM chips (2027+)
The relationship

Think of it like a restaurant: TSMC grows and butchers the meat (fab). The OSAT is the kitchen that cooks, plates, and serves it (assembly + test). Some restaurants do it all in-house — but when you're slammed, you outsource the plating.

Step 5
Test & Ship
Multiple locations

✅ Final validation & delivery

Finished chips undergo final testing, get sorted by performance tier ("binning"), and ship to customers.

  • Binning: Faster chips get premium pricing, slower ones sell at discount tiers
  • Burn-in: Run chips at high temp/voltage to weed out early failures
  • Test equipment: Companies like Teradyne and Advantest make the machines
Step 6
Customer
Data centers worldwide

MetaOpenAICerebrasCloudflare

The finished ARM AGI CPUs get installed in servers. These customers are buying a chip that went through this entire supply chain — designed in Cambridge, printed in Taiwan, packaged and tested, then shipped to their data centers.

Full circle

From tape-out to data center: ~6-9 months. ARM sent the design to TSMC, TSMC printed it, the packaging ecosystem assembled it, and now Meta is running AI workloads on it. Every link in this chain is a potential investment.

🧠

ARM ARM

Designs the chip. New: also selling it. Competes with its own licensees.

⚡

TSMC TSM

Prints the silicon AND does advanced packaging (CoWoS) for top-tier chips.

🏭

ASE ASX

#1 OSAT. Takes overflow from TSMC. Packages for everyone — ARM & Intel agnostic.

🇺🇸

Amkor AMKR

US-based OSAT. Arizona campus = back-end for TSMC's US fabs. Apple customer.

🔬

Test Equipment

Teradyne (TER) & Advantest (6857.T) make the machines that verify every chip works.